изучаю make

makefile

@@ -0,0 +1,70 @@
+CC = gcc
+CFLAGS = -Wall -Wextra -std=c11
+LIBRARIES= -L ./libraries/lwcell/build -l lwcell.so -lm
+INCLUDES = -I ./source -I ./libraries/lwcell/include
+
+# define variable for our dependencies' Makefiles.
+# we use find to grab only the top level Makefiles and also some convenient ignores.
+DEPENDENCIES = $(shell find ./deps -maxdepth 2 -name Makefile -printf '%h\n' | grep -v 'unittest' | grep -v '^.$$')
+
+SOURCES = $(shell find ./source -name '*.c')
+
+SRC = source
+OBJ = objects
+BIN = bin
+TARGET = root
+
+PREFIX ?= /usr/local
+
+# Debug
+ifeq ($(DEBUG), 1)
+	CFLAGS += -DDEBUG=1 -ggdb
+endif
+
+# Release
+ifeq ($(RELEASE), 1)
+	CFLAGS += -O2
+endif
+
+# Shared
+ifeq ($(SHARED), 1)
+    SOURCES=$(shell find ./$(SRC)/libraries -name '*.c')
+    TARGET=my_lib
+endif
+
+OBJECTS = $(addprefix $(OBJ)/,$(SOURCES:%.c=%.o))
+
+.PHONY: all
+all: dependencies source
+
+.PHONY: dependencies 
+dependencies:  
+	git -C ./libraries/lwcell pull
+
+.PHONY: source 
+source: $(OBJECTS)
+	@mkdir -p $(BIN)
+ifeq ($(SHARED), 1)
+	$(CC) -shared -fPIC -o $(BIN)/$(TARGET).so $^ $(LIBRARIES)
+	ar -rcs $(BIN)/$(TARGET).a $^
+else
+	$(CC) $(CFLAGS) $(LIBRARIES) $^ -o $(BIN)/$(TARGET)
+endif
+	# $(CC) -o $(TARGET) $(OBJECTS) $(CFLAGS)
+
+$(OBJ)/%.o: %.c
+	@mkdir -p $(dir $@)
+	$(CC) -c -o $@ $< $(CFLAGS) $(INCLUDES)
+	
+.PHONY: clean
+clean:
+	@rm -rf $(OBJ)/* 2> /dev/null
+	@rm -f $(BIN)/* 2> /dev/null
+
+# .PHONY: install
+# install:
+# 	install $(TARGET) $(PREFIX)/bin
+
+# .PHONY: uninstall
+# uninstall:
+# 	@rm -f $(PREFIX)/bin/$(TARGET) 2> /dev/null